1. Field of the Invention
The present invention relates to an active matrix organic electroluminescence display device, and more particularly, to an active matrix electroluminescence display device and a method for manufacturing the same by a sequential lateral solidification (SLS) method that can obtain greater uniformity of luminance and a packing density of an integrated circuit (IC) than a related art low temperature poly process.
2. Discussion of the Related Art
Recently, various display devices such as liquid crystal display (LCD) device, a plasma display panel (PDP) device, a field emission display (FED) device and an electroluminescence (EL) device have been studied with development of flat display devices. These flat display devices are classified into. two types according to a driving method: a passive matrix method and an active matrix method. The passive matrix method requires current greater than the active matrix method.
Accordingly, in current driving methods of the FED and EL devices, it is regarded that the active matrix method is more efficient than the passive matrix method because the passive matrix method requires a greater current level than the active matrix method even though a line transmission time is equal.
FIG. 1 is an equivalent circuit diagram of a unit pixel in a related art two transistor (2T) active matrix organic electroluminescence display (OED) device.
As shown in FIG. 1, the related art active matrix organic electroluminescence display device includes a scan line 1, a data line 2, a power line 3, an electroluminescence device 7, a switching transistor 4, a driving transistor 5 and a capacitor 6.
At this time, the scan line 1 is formed in one direction, and then the data line 2. is formed perpendicular to the scan line 1. The power line 3 is formed in parallel to the data line 2 at a distance from the data line 2. The electroluminescence device 7 emits lights according to a voltage applied in a pixel region formed by the scan line 1, the data line 2 and the power line 3. The switching transistor 4 switches a signal of the data line 2 according to a signal of the scan line 1. Subsequently, the driving transistor 5 applies a power supply of the power line to the electroluminescence device according to a signal applied through the switching transistor 4. The capacitor 6 is formed between the power line 3 and a gate electrode of the driving transistor 5.
A structure of the unit pixel in the related art active matrix organic electroluminescence display device and a method of manufacturing the same will be described with reference to the accompanying drawings.
FIG. 2 is a layout of the related art active matrix organic electroluminescence display device of FIG. 1.
FIG. 3 is a sectional view of the related art active matrix organic electroluminescence display device taken along line I-I′ of FIG. 2.
First and second semiconductor layers 4a and 5a having an island-shape are formed on portions of a substrate 10 where the switching and driving transistors 4 and 5 will be formed, respectively. At this time, an amorphous silicon a-Si:H is deposited on entire surface of the substrate. Then, the amorphous silicon is crystallized to a polysilicon in a scanning method using an excimer laser and is selectively removed to form the first and second semiconductor layers 4a and 5a. 
A gate insulating layer 30 is formed on the entire surface of the substrate 10 including the first and second semiconductor layers 4a and 5a. Then, the scan line 1 is formed to cross the first semiconductor layer 4a on the gate insulating layer 30, and the gate electrode of the driving transistor 5b is formed to cross the second semiconductor layer 5a. At this time, the scan line 1 and the gate electrode 5b of the driving transistor are isolated from each other, and the gate electrode 5b is widened at a certain portion to form a capacitor overlapped with the power line 3, which will be formed in a later step.
Impurity ions are injected to the first and second semiconductor layers at both sides of the scan line 1 and the gate electrode 5b of the driving transistor, thereby forming source/drain regions, respectively.
Accordingly, the switching transistor 4 is formed by the scan line 1 and the first semiconductor layer 4a, and the driving transistor 5 is formed by the gate electrode 5b and the second semiconductor layer 5a. 
An insulating interlayer 50 is formed on the entire surface of the substrate including the scan line 1 and the gate electrode 5b, and then contact holes are respectively formed at source and drain regions and the gate electrode 5b of the first semiconductor layer 4a, and the source region of the second semiconductor layer 5a. 
The data line 2 connected with the source region of the first semiconductor layer 4a is formed perpendicular to the scan line 1 on the insulating interlayer 50. The power line 3 connected with the source region of the second semiconductor layer 5a is formed perpendicular to the scan line 1 to be overlapped with the gate electrode 5b. Then, an electrode pattern 20 is formed to connect the drain region of the first semiconductor layer 4a to the gate electrode 5b. At this time, the capacitor 6 is formed in a portion where the gate electrode 5b and the power line 3 overlap each other.
Then, an insulating layer 70 for planarization is formed on the entire surface of the substrate 10. The contact hole is formed at the drain region of the second semiconductor layer 5a on the insulating layer 70, thereby forming the electroluminescence device 7 connected to the drain region.
A method of manufacturing the related art active matrix organic electroluminescence display device having the above structure will be described as follows.
The amorphous silicon a-Si:H is deposited on the substrate 10, and then is crystallized to the polysilicon by an exicmer laser. Then, the crystallized polysilicon is selectively removed to form the first and second semiconductor layers 4a and 5a having an island shape corresponding to portions where the switching and driving transistors 4 and 5 will be formed, respectively.
A method for crystallizing the amorphous silicon to the polysilicon by the scanning method of the excimer laser will be described in detail.
FIG. 4 is a plan view for illustrating the method of crystallizing according to a related art laser annealing method (scanning method).
A laser beam having a width of 0.5 mm or less and a length shorter than an LCD panel is emitted to the amorphous silicon for crystallizing the amorphous silicon as polysilicon in the scanning method. At this time, the laser beam is transferred at 25 μm per pulse from one side of the LCD panel to other side vertically.
The gate insulating layer 30 is formed on the entire surface of the substrate 10 including the first and second semiconductor layers 4a and 5a, and then a metal layer is deposited on the entire surface of the substrate. Then, the metal layer is selectively removed to form the scan line 1 crossing the first semiconductor layer 4a on the gate insulating layer 30, simultaneously, to form the gate electrode 5b of the driving transistor crossing the second semiconductor layer 5a. At this time, the scan line 1 and the gate electrode 5b of the driving transistor are isolated from each other. Then the gate electrode 5b is widened at a certain portion to form a capacitor overlapped with the power line 3, which will be formed in a later step.
Impurity ions are injected to the first and second semiconductor layers 4a and 5a using the scan line 1 and the gate electrode 5b of the driving transistor as masks, thereby forming the source and drain regions of the switching and driving transistors.
Accordingly, the switching device 4 is formed by the scan line 1 and the first semiconductor layer 4a, and the driving transistor 5 is formed by the gate electrode 5b and the second semiconductor layer 5a. 
The insulating interlayer 50 is formed on the entire surface of the substrate 10 including the scan line 1 and gate electrode 5b. Then, the insulating interlayer 50 and the gate insulating layer 30 are selectively removed to expose the source and drain regions and the gate electrode 5b of the first semiconductor layer 4a, and the source region of the second semiconductor layer 5a, thereby forming each contact hole.
The metal layer is deposited on the entire surface of the substrate and then is selectively removed. Therefore, the data line 2 connected with the source region of the first semiconductor layer 4a is formed perpendicular to the scan line 1 on the insulating interlayer 50. Simultaneously, the power line 3 connected with the source region of the second semiconductor layer 5a is formed perpendicular to the scan line 1 to be overlapped with the gate electrode 5b. Then, the electrode pattern 20 is formed to connect the drain region of the first semiconductor layer 4a to the gate electrode 5b. 
Then, the insulating layer 70 is formed on the entire surface of the substrate. The contact hole is formed at the drain region of the second semiconductor layer 5a on the insulating layer 70, thereby forming the electroluminescence device 7 connected to the drain region.
However, the related art active matrix organic electroluminescence display device and the method for manufacturing it have the following problems.
FIG. 5 illustrates a grain boundary and a carrier movement direction of the polysilicon in the crystallizing method of the related art scanning method.
The amorphous silicon is crystallized to polysilicon by the excimer laser to form the first and second semiconductor layers, but the grain boundary is irregularly formed perpendicular to a channel direction. Accordingly, an operating voltage of each transistor is not uniform, thereby generating a line on a display panel.
That is, the amorphous silicon is deposited on the substrate, and then the amorphous silicon is crystallized to polysilicon in the scanning method by the excimer laser. At this time, the amorphous silicon includes Hydrogen at a certain ratio. Therefore, Hydrogen has to be removed and the amorphous silicon has to be crystallized at a low temperature to prevent deformation from occurring in the substrate. That is, the manufacturing process steps are complicated.
Also, a certain pulse is applied to each scanning line in the scanning method by the excimer laser, and the laser is not successively emitted. Accordingly, laser energy emitted to each scanning line is not uniform, thereby generating the line on the display panel. That is, a characteristic of a TFT according to each scanning line is irregular due to the lines on the display panel, so that the lines are reflected to the active matrix organic electroluminescence display device, thereby degrading uniformity of luminance.
That is, the semiconductor layer serves as a channel, and a current path is formed of silicon. At this time, a crystallized state of the silicon grain is irregular, so that the characteristic of the TFT driving each pixel is different. Therefore, even though an equal gray level is applied, the amount of the current in each TFT is different, thereby generating a luminance difference between pixels.
Also, since a size of the silicon grain is not regular, a non-uniform characteristic is generated in a boundary of the grain during fabricating the TFT, thereby generating non-uniform luminance.
To solve a problem such as the non-uniform luminance, technology forming four TFTs in the pixel region is used. However, the technology may generate defects in manufacturing process steps. Also, an aperture ratio may be decreased by an increased number of TFTs.